# Digital Logic - Unit Wise Questions

Unit 1: Introduction
38 Questions

2. Subtract: 1010.110 – 101.101 using both 2's and 1's complement. [5]

5 marks | Asked in 2019

1.

i) Which one of the following is hexadecimal equivalent of (5073.052)8?

a) A3C.150    b) B2B.140    c) A3B.150    d) B3A.150

1 marks | Asked in 2019-Objective

11.Subtract: 675.6 – 456.4 using both 10's and 9's complement.[5]

5 marks | Asked in 2018

12.What is university logic gate? Realize NAND and NOR as an universal logic gates. [1+2+2]

5 marks | Asked in 2018

1.

ii) Which one of the following is 9's complement of (3578.501)10?

a) 4926.947    b) 3926.947    c) 4926.937    d) None of the Above

1 marks | Asked in 2019-Objective

3. Simplify (Using k-map) the given Boolean function in both SOP and POS using the don’t

care condition d:

5 marks | Asked in 2019

4. Define decoder. Draw logic diagram and truth table of 3 to 8-line decoder. [1 + 4]

5 marks | Asked in 2019

1.

iii) Which one of the following is the equivalent reflected code of 1101?

a) 1001    b) 1011    c) 1000    d) 1010

1 marks | Asked in 2019-Objective

13. Simplify (using K- map) the given Boolean function F in both SOP and POS using don't care conditions D: B'CD' + A'BC'D

F = B'C'D' + BCD' + ABCD'   [2+3]

5 marks | Asked in 2018

1.

iv) When output will go high in NOR Gate?

a) if all inputs are high    b) if any input is high    c) if any input is low    d) if all inputs are low

1 marks | Asked in 2019-Objective

14.Define encoder: Draw logic diagram and truth table of octal - to - binary encoder. [1 + 4]

5 marks | Asked in 2018

5. Define ROM. Implement the following combinational logic function using ROM: [2 + 3]

5 marks | Asked in 2019

15.What is D flip-flop? Explain clocked RS flip-flop with its logic diagram and truth table.[1+4]

5 marks | Asked in 2018

6. What are the drawbacks of clocked RS flip flop? Explain the operation of JK Flip flop along with its circuit diagram and characteristic table. [2+3]

5 marks | Asked in 2019

1.

v) According to Boolean algebra: What is the value of

a)     b)1    c)0    d) X

1 marks | Asked in 2019-Objective

16.Design MOD - 5 counter with state and timing diagram.[2+1+2]

5 marks | Asked in 2018

1.

vi) The logic circuits whose outputs at any instant of time depends only on the present input but also on the past outputs are called

a) Combinational circuits    b) Sequential circuits    c) Latches    d) Flip-flops

1 marks | Asked in 2019-Objective

7. What is T flip-flop? Explain clocked JK flip-flop with its logic diagram and truth table. [1 + 4]

5 marks | Asked in 2019

17. Design a 4 - bit serial into parallel- out shift register with timing diagram. [3+2]

5 marks | Asked in 2018

8. Design MOD - 7 counter with state and timing diagram. [2 + 1 + 2]

5 marks | Asked in 2019

1.

vii) If Q = 1, the output is said to be

a) Reset    b) Set    c) Previous state    d) current state

1 marks | Asked in 2019-Objective

1.

viii) Which one of the following are also called ripple counters?

a) SSI counters    b) Synchronous counters    c) Asynchronous counters    d) VLSI counters

1 marks | Asked in 2019-Objective

1.

ix) How many flip-flops are required to construct MOD-30 counter?

a) 5    b) 6    c) 4    d) 8

1 marks | Asked in 2019-Objective

1.

x) How much storage capacity does each stage in a shift register represent?

a) One bit    b) Two bits    c) Four bits    d) Eight bits

1 marks | Asked in 2019-Objective

18. Write difference between PLA and PAL. Design a PLA circuit with given functions.

F1 (A, B, C) = Σ (2, 3, 5)

F2 (A, B, C) = Σ (0, 4, 5, 7). Design PLA program table also.[3+7]

10 marks | Asked in 2018

9. Define PLA. Design a PLA circuit with given functions.

F1 (A, B, C) = Σ (3, 5, 6, 7)

F2 (A, B, C) = Σ (0, 2, 4, 7). Design PLA program table also. [3 + 7]

10 marks | Asked in 2019

10. Distinguish between sequential and combinational logic with example? Discuss the design procedure of combinational logic. [4+6]

10 marks | Asked in 2019

19.Define D flip-flop. Design a Master-slave flip-flop by using JK flip-flop along with its circuit diagram and truth table. [2+8]

10 marks | Asked in 2018

11. A sequential circuit with two D flip-flops, A and B, two inputs x and y, and one output z, is specified by the following next state and output equations [4+3+3]

A(t+1) = x'y + x A

B(t +1) = x'B + x A

z = B

a) Draw the logic diagram.

b) Derive the state table.

c) Derive the state diagram.

10 marks | Asked in 2019

20.Write down the difference between asynchronous and synchronous counter. Design a 4-bit binary ripple counter along with its circuit, state and timing diagram. [3+7]

10 marks | Asked in 2018

3. Simplify given Boolean function in both SOP and POS using K-Map  where d represents don't care condition.

F(A,B,C,D)=

5 marks | Asked in 2021

5. Define Priority encoder. Design 4:2 priority encoder with its block diagram, truth table, circuit diagram and mathematical expression.

5 marks | Asked in 2021

6. Why NAND and NOR gates are called universal gates? Realize NAND gate as universal gate.

5 marks | Asked in 2021

7. What is race around condition? Explain how JK master flip flop is used to eliminate race around condition.

5 marks | Asked in 2021

8. Differentiate between synchronous and ripple counter. Design mod 7 ripple counter with its state diagram, sequence table,logic diagram and timing diagram.

5 marks | Asked in 2021

9. Define PLA with its block diagram.Realize BCD to gray code converter using PAL.

10 marks | Asked in 2021

10. What is register? Explain types of registers depending on input output with its block diagram and logic diagram.

10 marks | Asked in 2021

11. What is state diagram? A sequential circuit with two D flip-flops A and B, one input x and one output z by the following next state and output equations:

A(t+1)= A'+B, B(t+1)=B'x, z= A+B'

i)   Draw the logic diagram of the circuit

ii) Draw the state table

iii) Draw the state diagram of the circuit

10 marks | Asked in 2021

Unit 2: Number Systems
1 Questions

2. Subtract 11101.111-10100.101 using 1's and 2's complement.

5 marks | Asked in 2021

Unit 3: Combinational Logic Design
1 Questions

4. Define combinational circuit. Write a combinational circuit design procedure. Design a half adder with its truth table, logic diagram and Boolean expression.

5 marks | Asked in 2021

Unit 4: Counters & Registers
0 Questions
Unit 5: Sequential Logic Design
0 Questions