Digital Logic(DL) Syllabus
This page contains Syllabus of Digital Logic of CSIT.
Title | Digital Logic |
Short Name | DL |
Course code | CSC111 |
Nature of course | Theory + Lab |
First Semester | |
Full marks | 60 + 20 + 20 |
Pass marks | 24 + 8 + 8 |
Credit Hrs | 3 |
Elective/Compulsary | Compulsary |
Course Description
Course Description: This course covers the concepts of digital logic and switching networks. The course
includes the fundamental concepts of boolean algebra and its application for circuit analysis, multilevel
gates networks, flip-lops, counters logic devices and synchronous and asynchronous sequential logic and
digital integrated circuits.
Course Objectives: The main objective of this course is to introduce the basic tools for the design of
digital circuits and introducing methods and procedures suitable for a variety of digital design
applications.
Units and Unit Content
- 1. Binary Systems
- teaching hours: 6 hrs
Digital Systems, Binary numbers, Number base conversion, Octal and hexadecimal numbers,
compliments, Signed Binary numbers, Decimal codes (BCD, 2 4 2 1,8 4 -2 -1,Excess 3, Gray
Code), Binary Storage and Registers, Binary logic
- 2. Boolean algebra and Logic Gates
- teaching hours: 5 hrs
Basic and Axiomatic definitions of Boolean algebra, Basic Theorems and properties of Boolean
Algebra, Boolean Functions, Logic Operations, Logic Gates, Integrated Circuits
- 3. Simplification of Boolean Functions
- teaching hours: 5 hrs
K-map, Two and Three variable maps, Four variable maps, product of sum simplification,
NAND and NOR implementation, Don't Care conditions, Determinant and selection of Prime
Implicants
- 4. Combinational Logic
- teaching hours: 5 hrs
Design Procedure, Adders, Subtractors, Code Conversions, Analysis Procedure, Multilevel
NAND and NOR Circuits, Exclusive-OR Circuits
- 5. Combinational Logic with MSI and LSI
- teaching hours: 8 hrs
Binary Parallel Adder and Subtractor, Decimal Adder, Magnitude Comparator, Decoders and
Encoders, Multiplexers, Read-only-Memory (ROM), Programmable Logic Array (PLA),
Programmable Array Logic (PAL)
- 6. Synchronous and Asynchronous Sequential Logic
- teaching hours: 10 hrs
Flip-Flops, Triggering of flip-flops, Analysis of clocked sequential circuits, Design with state
equations and state reduction table, Introduction to Asynchronous circuits, Circuits with latches.
- 7. Registers and Counters
- teaching hours: 6 hrs
Registers, Shift registers, Ripple Counters, Synchronous Counters, Timing Sequences, The
memory
Lab and Practical works
Laboratory works:
Introduction to logic gates with IC pin details and verify the truth table using bread board.
1. Use any one simulator to simulate the basic logic circuits functions.
2. Design of half adder, full adder, subtractor using basic logic gates.
3. Study and verification of 3-8 decoder using IC.
4. Study and verification of 8-3 encoder using IC
5. Implementation of 4-1 Mux using IC
6. Implementation of 1-4 DeMux using IC
7. Implementation of 7 Segment Display
8. Verification of Flip flop
9. Design and verification of Up counter/Down counter
10. Design and verification of Shift Register