This page contains Syllabus of Digital Logic of BIT.

Title Digital Logic
Short Name DL
Course code BIT103
Nature of course Theory + Lab
First Semester
Full marks 60 + 20 + 20
Pass marks 24 + 8 + 8
Credit Hrs 3
Elective/Compulsary Compulsary

Course Description

Course Description:

This course familiarizes students with Number System, Digital Design Fundamentals, Understand and Design Functions of Combinational Logic, Sequential Logic (Counters, Registers and Finite State Machine), Memories, Programmable Logic Devices Integrated Circuit Technologies.

Course Objective:

To provide the concepts used in the design and analysis of digital systems and introduces the principles of digital computer organization and design.

Units and Unit Content

1. Number Systems, Operations and Codes
teaching hours: 6 hrs

History of Number System, Introduction to Number System (Positional and Non positional), Decimal, Binary, Octal, Hexadecimal Number Systems Conversion from one number system to another (Binary, Octal, Hex to Decimal; Decimal to Binary, Octal and Hex; Binary to Octal, Octal to Binary, Binary to Hex, Hex to binary) Compliment of Number Systems (r's complement and r-1's compliment with r as 2 and 10) Addition and Subtraction of Binary Numbers, Binary Codes (Absolute, Gray Code, weighted binary code, BCD, ASCII, Unicode) and Error Detection Codes

2. Digital Design Fundamentals and Boolean algebra
teaching hours: 8 hrs

Digital and Analog Signals (Definition, example and difference between them)Logic Operations (Definition and Truth Table of AND, OR, NOT) Introduction to the System Concept, Logic Gates (Basic Gates, Derived Gates, Universal Gates)Logic Function and Boolean Algebra (characteristics, laws, simplifications using laws, principle of duality)

3. Simplification of Boolean Functions
teaching hours: 5 hrs

K-map, Two and Three variable maps, Four variable maps, product of sum simplification NAND and NOR implementation, Don't Care conditions

4. Combinational Logic
teaching hours: 7 hrs

Adders and Subtractors (Half and full binary adder and subtractor), Parallel Binary Adders,Multiplexers and Demultiplexers, Encoders and Decoders, Seven segment decoder, Code Converters, Magnitude comparator (2 bit and 4 bit)

5. Sequential Logic
teaching hours: 4 hrs

Latches and Flip-Flops (RS, JK, D, T, Master-Slave), Edge-Triggered Flip-Flops, Flip-Flop Operating Characteristics, Flip-Flop Applications

6. Counters, Registers and Memory
teaching hours: 9 hrs

Asynchronous Counters, Synchronous Counters, Up/Down Counters, Counter Applications, Basic Shift Register Operations, Shift Register Types, Bidirectional Shift Registers, Shift Register Counters, Basic Memory Operations and memory types (ROM, PLA, PAL)

7. Processor Logic Design
teaching hours: 6 hrs

Processor Organization, Arithmetic Logic Unit, Design of Arithmetic Circuit, Design of Logic Circuit, Design of Arithmetic Logic Unit (one bit ALU design only) Status Register, Design of Shifter (4 bit combinational logic shifter)

Lab and Practical works